The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming a butted semiconductor-on-insulator (SOI) junction butting structure using a nonuniform trench shape.
Integrated circuits fabricated in partially-depleted semiconductor on insulator (SOI) technology rely on adjacent field effect transistors (FETs) which share the same active region being electrically isolated from each other. However, when coupled with the need for decreasing the size of the FETs, such as, for example, in very-large-scale integration (VLSI) technologies like high density microprocessor or memory technologies, the very nature of the isolation can create undesired effects in the FETs such as back channel leakage and short channel effects.